fixed bug in read-out of default store TP

This commit is contained in:
JanLJL
2024-08-19 14:37:20 +02:00
parent 628bdf6518
commit 2bdc765df2
2 changed files with 14 additions and 2 deletions

View File

@@ -15,6 +15,7 @@ class MemoryOperand(Operand):
pre_indexed=False,
post_indexed=False,
indexed_val=None,
src=None,
dst=None,
source=False,
destination=False,
@@ -29,6 +30,8 @@ class MemoryOperand(Operand):
self._pre_indexed = pre_indexed
self._post_indexed = post_indexed
self._indexed_val = indexed_val
# type of register we store from (`src`) or load to (`dst`)
self._src = src
self._dst = dst
@property
@@ -71,6 +74,14 @@ class MemoryOperand(Operand):
def indexed_val(self):
return self._indexed_val
@property
def src(self):
return self._src
@src.setter
def src(self, src):
self._src = src
@property
def dst(self):
return self._dst

View File

@@ -179,6 +179,7 @@ class MachineModel(object):
offset=m["offset"],
scale=m["scale"],
index=m["index"],
src=m["src"] if "src" in m else None,
),
m["port_pressure"],
)
@@ -408,8 +409,8 @@ class MachineModel(object):
st_tp = [
tp
for tp in st_tp
if "src" in tp[0]
and self._check_operands(src_reg, RegisterOperand(name=tp[0]["src"]))
if tp[0].src is not None
and self._check_operands(src_reg, RegisterOperand(name=tp[0].src))
]
if len(st_tp) > 0:
return st_tp.copy()