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[WIP] added test case and modified port counts to match imported model

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This commit is contained in:
Julian Hammer
2019-01-11 14:36:48 +01:00
parent 6650145543
commit 880dc332c8
3 changed files with 34 additions and 12 deletions
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4
osaca/eu_sched.py
View File

@@ -12,8 +12,8 @@ from osaca.param import Register, MemAddr
class Scheduler(object):
arch_dict = {'SNB': 6, 'IVB': 6, 'HSW': 8, 'BDW': 8, 'SKL': 8, 'ZEN': 10}
dv_ports_dict = {'SKL': [0], 'ZEN': [3]}
arch_dict = {'SNB': 6, 'IVB': 6, 'HSW': 8, 'BDW': 8, 'SKL': 8, 'SKX': 8, 'ZEN': 10}
dv_ports_dict = {'ZEN': [3]} # FIXME 'SKL': [0], 'SKX': [0] disabled due to uops.info export
# content of most inner list in instrList: instr, operand(s), instr form
df = None # type: DataFrame
# for parallel ld/st in archs with 1 st/cy and >1 ld/cy, able to do 1 st and 1 ld in 1cy

2
osaca/osaca.py
View File

@@ -362,7 +362,7 @@ class OSACA(object):
longestInstr = 30
machine_readable = False
VALID_ARCHS = ['SNB', 'IVB', 'HSW', 'BDW', 'SKL', 'ZEN']
VALID_ARCHS = Scheduler.arch_dict
def __init__(self, arch, assembly, extract_with_markers=True):
"""

40
tests/test_osaca.py
View File

@@ -13,35 +13,57 @@ from osaca import osaca
class TestOsaca(unittest.TestCase):
maxDiff = None
def setUp(self):
self.curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
@unittest.skip("Binary analysis is error prone and currently not working with FSF's objdump")
def testIACABinary(self):
curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
assembly = osaca.get_assembly_from_binary(curr_dir + '/testfiles/taxCalc-ivb-iaca')
assembly = osaca.get_assembly_from_binary(self.curr_dir + '/testfiles/taxCalc-ivb-iaca')
osa = osaca.OSACA('IVB', assembly)
result = osa.generate_text_output()
result = result[result.find('Port Binding in Cycles Per Iteration:'):]
with open(curr_dir + '/test_osaca_iaca.out', encoding='utf-8') as f:
with open(self.curr_dir + '/test_osaca_iaca.out', encoding='utf-8') as f:
assertion = f.read()
self.assertEqual(assertion.replace(' ', ''), result.replace(' ', ''))
# Test ASM file with IACA marker in two lines
def testIACAasm1(self):
curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
with open(curr_dir + '/testfiles/taxCalc-ivb-iaca.S') as f:
with open(self.curr_dir + '/testfiles/taxCalc-ivb-iaca.S') as f:
osa = osaca.OSACA('IVB', f.read())
result = osa.generate_text_output()
result = result[result.find('Port Binding in Cycles Per Iteration:'):]
with open(curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f:
with open(self.curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f:
assertion = f.read()
self.assertEqual(assertion.replace(' ', ''), result.replace(' ', ''))
# Test ASM file with IACA marker in four lines
def testIACAasm2(self):
curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
with open(curr_dir + '/testfiles/taxCalc-ivb-iaca2.S') as f:
with open(self.curr_dir + '/testfiles/taxCalc-ivb-iaca2.S') as f:
osa = osaca.OSACA('IVB', f.read())
result = osa.generate_text_output()
result = result[result.find('Port Binding in Cycles Per Iteration:'):]
with open(curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f:
with open(self.curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f:
assertion = f.read()
self.assertEqual(assertion.replace(' ', ''), result.replace(' ', ''))
#@unittest.skip("Skip until required instructions are supported.")
def test_asm_API(self):
with open(self.curr_dir + '/testfiles/3d-7pt.iaca_marked.s') as f:
osa = osaca.OSACA('SKL', f.read())
text_output = osa.create_output()
print(text_output)
# Derived from IACA (and manually considering OSACAs equal distribution to ports)
self.assertEqual(dict(osa.get_port_occupation_cycles()),
{'0': 4.0,
'0DV': 0.0,
'1': 3.5,
'2': 3.5,
'3': 3.5,
'4': 1.0,
'5': 4.5,
'6': 3.5,
'7': 0.0})
# TODO consider frontend bottleneck -> 6.25 cy
self.assertEqual(osa.get_total_throughput(),
4.5)