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https://github.com/RRZE-HPC/OSACA.git
synced 2025-12-16 00:50:06 +01:00
bugfixed CLX as uarch flag
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@@ -20,7 +20,6 @@ SUPPORTED_ARCHS = [
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"BDW",
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"SKX",
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"CSX",
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"CLX",
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"ICL",
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"ZEN1",
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"ZEN2",
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@@ -182,6 +181,9 @@ def check_arguments(args, parser):
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"""
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supported_import_files = ["ibench", "asmbench"]
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# manually set CLX to CSX to support both abbreviations
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if args.arch.upper() == "CLX":
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args.arch = "CSX"
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if args.arch is None and (args.check_db or "import_data" in args):
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parser.error(
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"DB check and data import cannot work with a default microarchitecture. "
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@@ -191,9 +193,6 @@ def check_arguments(args, parser):
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parser.error(
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"Microarchitecture not supported. Please see --help for all valid architecture codes."
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)
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# manually set CLX to CSX to support both abbreviations
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if args.arch.upper() == "CLX":
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args.arch = "CSX"
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if "import_data" in args and args.import_data not in supported_import_files:
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parser.error(
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"Microbenchmark not supported for data import. Please see --help for all valid "
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