7 Commits

Author	SHA1	Message	Date
JanLJL	31f5912af6	take +- operator of offset/index in mem-addr into account	2025-03-14 18:46:12 +01:00
pleroy	732dd95810	Rewrite the parsing of register expressions. GCC, for reasons unknown, put the displacement in the middle. ... I am completely restructuring the parser definition so that they are more explicit. They are more verbose too, but at least I understand what they do.	2025-03-12 22:26:38 +01:00
JanLJL	b7e5df0a08	more black formatting	2025-03-05 10:40:18 +01:00
JanLJL	fb7f1a289d	flake8 formatting	2025-03-05 10:19:10 +01:00
JanLJL	a4939d1873	renamed .asm files to .s for consistency	2025-03-05 09:36:07 +01:00
JanLJL	1c2e0f3921	chmod +x	2025-03-04 17:46:23 +01:00
pleroy	b4d342266d	Add support for the Intel syntax supported by MSVC and ICC	2025-02-02 14:02:16 +01:00