Commit Graph

59 Commits

Author SHA1 Message Date
Metehan Dundar
1ceac6e9f3 Refactor: RISC-V parser, code formatting, and flake8 compliance
- Enhanced RISC-V parser to support reloc_type and symbol in ImmediateOperand.
- Added missing attributes (reloc_type, symbol) to ImmediateOperand and updated __eq__ for backward compatibility.
- Fixed all flake8 (E501, E265, F401, F841) and Black formatting issues across the codebase.
- Improved docstrings and split long lines for better readability.
- Fixed test failures related to ImmediateOperand instantiation and attribute errors.
- Ensured all tests pass, including edge cases for RISC-V, x86, and AArch64.
- Updated .gitignore and documentation as needed.
- Renamed example files for consistency (rv6 -> rv64).
2025-07-04 23:21:06 +02:00
JanLJL
aeecac3b5f Black formatting 2024-05-02 17:04:56 +02:00
stefandesouza
9cd841cd08 Added updated files 2024-02-27 14:47:55 +01:00
stefandesouza
86d90275d3 Uncommented check for unknown TP flags 2024-02-22 13:50:31 +01:00
stefandesouza
33ad20dc3a More formatting 2024-01-10 13:26:50 +01:00
stefandesouza
cce05e44cb Changed style to conform to PEP-8 conventions; Added source and destination attributes to parent Operand class 2023-10-29 13:52:49 +01:00
stefandesouza
17cd1a70c7 Updated tests to use the now class style iforms in isa_data 2023-10-23 16:25:31 +02:00
stefandesouza
d664db316c frontend tests now use new OO style, removed AttrDict usage 2023-10-22 16:43:46 +02:00
stefandesouza
0f182551f2 Changes to accomodate the new OO style 2023-08-28 15:19:46 +02:00
JanLJL
29c00462e2 enhanced YAML output to include all kernel objects and no ruamel.yaml-specific data types 2023-08-15 14:01:11 +02:00
Stephen Nicholas Swatman
8615c33df6 Add support for structured YAML output
This commit adds a new `--yaml-out` flag to OSACA which allows the user
to dump the results of an analysis to a YAML file, allowing them to
analyse the file more easily. I have tried to make the output as
comprehensive as possible.
2023-08-12 19:43:43 +02:00
JanLJL
0985e81b23 added more dependency analysis for post/pre indexing and condition flags 2023-03-14 17:00:02 +01:00
JanLJL
f901b481da black formatting 2021-11-04 12:11:15 +01:00
JanLJL
f801950ffb better output formatting 2021-11-04 11:55:48 +01:00
JanLJL
1b40c10a1f applied flake8 and black rules 2021-08-26 16:58:19 +02:00
JanLJL
129052a84a fixed incompatibilty to py3.6 2021-04-20 13:59:56 +02:00
JanLJL
5b95f1f909 enhanced LCD analysis by making it parallel and added timeout flag 2021-04-19 00:04:03 +02:00
Julian
04836cf3f9 Validation (#71)
Validating of OSACA predictions for IVB, SKX, ZEN1, ZEN2, A64FX and TX2 with different kernels.

build_and_run.py contains the configuration used at RRZE's testcluster and UR's qpace4, Analysis.ipynb contains the analysis script and results. Raw data from measurements (122MB) will be attached to next OSACA release.

For now, find the raw data here: https://hawo.net/~sijuhamm/d/UPIhBOtz/validation-data.tar.gz

The analysis report can be viewed at https://nbviewer.jupyter.org/github/RRZE-HPC/OSACA/blob/validation/validation/Analysis.ipynb

Quite a few changes on OSACA included:

Feature: register change tracking via semantic understanding of operations
Feature: recording LCD latency along path and exposing this to frontend
Feature: support for memory reference aliases
Feature: store throughput scaling (similar to load throughput scaling)
Fix: model importer works with latest uops.info export
Fix: immediate type tracking on ARM now preserves type in internal representaion
Removed unused KerncraftAPI
2021-04-15 14:42:37 +02:00
Julian Hammer
0f8e53e918 making flake8 happy 2021-03-11 12:29:14 +01:00
Julian Hammer
afa607e546 migrate code style to Black 2021-03-11 12:02:45 +01:00
JanLJL
cbcd868297 cover kernel with only unknown instructions 2021-01-07 12:40:16 +01:00
JanLJL
315e059a2f fetch version from __init__ file and write uarch in upper case 2020-11-21 21:33:33 +01:00
Julian Hammer
9b8379cf88 fixed typo 2020-11-10 13:33:24 +01:00
JanLJL
1ba46da7c9 minor bugfix in HW model and added user warnings for more insight 2020-11-06 15:06:36 +01:00
JanLJL
2df4b353ed no \t replacement before any other point than user output 2020-10-16 09:44:18 +02:00
JanLJL
94356552e1 fixed wrong output format for 3-digit TP numbers 2020-04-08 21:28:50 +02:00
Julian Hammer
5fc71ba795 flag string in output now in line with required flags 2020-03-24 16:02:40 +01:00
JanLJL
f323576fae renamed doc to docs and more documentation 2020-03-05 15:28:30 +01:00
JanLJL
32b82c7824 minor fixes and removed unnecessary load_tps 2020-02-26 15:40:52 +01:00
JanLJL
fe8fa87f1a bugfix for missing warning 2020-01-29 23:13:59 +01:00
Julian Hammer
1c792f91ac frontend returns strings; added helper function to calc. unmatched ratio 2020-01-28 17:24:00 +01:00
JanLJL
e250f69821 added --ignore-unknown flag and major updates in x86 parser 2020-01-09 17:57:08 +01:00
JanLJL
11f91fe9e1 added default load TP and relocation in identifier 2019-12-18 16:56:20 +01:00
JanLJL
00c6400208 performance enhancement by removing unnecessary DB parsings 2019-12-02 15:39:59 +01:00
JanLJL
b0f4414203 added documentation 2019-11-08 09:55:20 +01:00
JanLJL
f81b46a0a1 minor updates 2019-11-06 10:54:31 +01:00
JanLJL
fcb6c94667 added missing data ports in DB and nicer CP view for frontend 2019-10-31 19:40:20 +01:00
JanLJL
735fa108e9 enhanced by optimal throughput analysis 2019-10-29 16:52:34 +01:00
JanLJL
d1204f7e9d separated SemanticsAppender into ISA and Arch semantics 2019-10-29 09:09:52 +01:00
JanLJL
d8434bf6e0 fixed last problems with ibench import 2019-10-24 12:38:26 +02:00
JanLJL
6698276a20 added combined view for TP/CP/LDC 2019-10-16 19:00:24 +02:00
JanLJL
077de5cb42 changed DBs to new port_pressure structure 2019-10-16 10:06:47 +02:00
Julian Hammer
a9f05a7a70 removed some unnecessary file checks and fixed up test cases 2019-10-11 16:13:58 +02:00
JanLJL
2fba99fd64 version bump and dependency in setup 2019-09-27 18:25:25 +02:00
JanLJL
91d0037dd0 new dynamic tp and lt values for LD instructions 2019-09-26 21:39:56 +02:00
JanLJL
7370488583 nicer perspective of loop-carried deps 2019-09-18 00:09:26 +02:00
JanLJL
0cac74de3a changed zen port model from combined LD/ST to separate ones 2019-09-06 16:12:37 +02:00
JanLJL
da0a2455e2 bugifx 2019-08-30 13:53:45 +02:00
JanLJL
87e5d55940 bugifx 2019-08-30 13:50:18 +02:00
JanLJL
bddb10702a more tests for frontend 2019-08-30 12:28:04 +02:00