477 Commits

This Branch

This Branch

All Branches

Author	SHA1	Message	Date
JanLJL	b469f5a0c4	added tests for pre/post-indexed addr and prefetching	2019-05-28 18:22:28 +02:00
Julian Hornich	646490ac2a	Merge branch 'master' of https://github.com/RRZE-HPC/OSACA	2019-05-28 12:47:06 +02:00
Julian Hornich	8e13432318	Added AMD Zen instructions	2019-05-28 12:46:49 +02:00
JanLJL	f7ce5ac63c	version bump	2019-05-28 08:59:18 +02:00
JanLJL	01a6b15bb1	bugfix for testing	2019-05-28 08:59:04 +02:00
JanLJL	0925af21a0	finished ARM parser and added tests	2019-05-24 15:10:02 +02:00
JanLJL	b683bf7ce3	added -P flag in outputs	2019-05-22 09:36:20 +02:00
JanLJL	64a7cb8196	bugfix for importing ibench values	2019-05-16 18:45:51 +02:00
JanLJL	d14ccee0b4	version bump v0.2.2	2019-05-16 16:42:57 +02:00
JanLJL	171b57b381	supports directives in the kernel	2019-05-16 16:34:53 +02:00
JanLJL	d6042b4006	parser now understands and ignores asm directives	2019-05-16 15:51:28 +02:00
JanLJL	f9e6583959	more tests for parser	2019-05-03 14:45:21 +02:00
JanLJL	c1cf539c45	enabled instruction forms without any operands	2019-05-03 10:44:54 +02:00
JanLJL	8bd7be32e2	changed comma handling for operands	2019-05-02 19:04:01 +02:00
JanLJL	1f52157e9c	fixed tests	2019-05-02 18:52:16 +02:00
JanLJL	daa874b396	bugfixes	2019-04-30 18:57:18 +02:00
JanLJL	a84150f71b	fixed wrong import	2019-04-30 18:49:38 +02:00
JanLJL	c70e57ab1a	fixed for tests	2019-04-30 18:46:45 +02:00
JanLJL	f189d6aca5	fixed wrong testname	2019-04-30 18:40:38 +02:00
JanLJL	38bbf2712b	added tests and functionalities for x86_att parser	2019-04-30 18:37:07 +02:00
JanLJL	bc9b380429	removed broken landscape badge	2019-04-30 14:09:33 +02:00
JanLJL	2d32b3a92a	initial parser structure added	2019-04-30 14:06:24 +02:00
JanLJL	9e3aaa7336	update	2019-04-30 10:28:56 +02:00
JanLJL	bfd966e824	removed 3.7 builds since travis does not support it yet	2019-04-30 10:16:56 +02:00
JanLJL	2fa92bc0b0	prepared repo for version 3	2019-04-30 09:59:30 +02:00
JanLJL	07cbd63f47	Closes #28	2019-04-30 09:44:22 +02:00
Jan	bd4a5622b2	Merge pull request #27 from RRZE-HPC/imported_intel_models ... Imported intel models	2019-04-30 08:28:06 +02:00
Julian Hammer	01b23e1b47	Merge branch 'master' into imported_intel_models	2019-01-30 17:36:12 +01:00
Julian Hammer	aea6f8f043	added warning if data dirs differ. fixing #21	2019-01-30 17:35:27 +01:00
Julian Hammer	7d3857b023	(non realease) version bump to match up with kerncraft	2019-01-30 15:54:23 +01:00
Julian Hammer	179c78c9ec	Merge branch 'imported_intel_models' of github.com:RRZE-HPC/OSACA into imported_intel_models	2019-01-29 13:53:06 +01:00
Julian Hammer	c0413de556	api to get ratio of unmatched instructions	2019-01-29 13:52:12 +01:00
Julian Hammer	3b027e2453	added CFL and KBL	2019-01-29 13:52:12 +01:00
Julian Hammer	5cd80f4e82	updated importer and evaluation functions	2019-01-29 13:52:12 +01:00
Julian Hammer	29e4974662	pep8	2019-01-29 13:52:12 +01:00
Julian Hammer	7185174885	making progress on covering ambigious instruction forms	2019-01-29 13:52:12 +01:00
Julian Hammer	d3d46bfff5	Masking instruction duplication mentioned in #24	2019-01-29 13:52:12 +01:00
Julian Hammer	fbc3437cce	added missing test file	2019-01-29 13:52:12 +01:00
Julian Hammer	db1cdf5474	[WIP] added test case and modified port counts to match imported model	2019-01-29 13:52:12 +01:00
Julian Hammer	a460ca8d55	adde model importer and imported models from uops.info	2019-01-29 13:52:11 +01:00
Julian Hammer	595cfa02a0	fixed marker insertion	2019-01-29 13:29:03 +01:00
Julian Hammer	216fbfa7bc	ignoring .loc	2019-01-29 13:28:52 +01:00
Julian Hammer	bac3104c0a	api to get ratio of unmatched instructions	2019-01-18 14:19:39 +01:00
Julian Hammer	64de49d497	added CFL and KBL	2019-01-16 14:53:50 +01:00
Julian Hammer	4be8bcafc4	updated importer and evaluation functions	2019-01-16 14:53:11 +01:00
Julian Hammer	4eaa1eeb7d	pep8	2019-01-15 13:48:09 +01:00
Julian Hammer	4038f07002	making progress on covering ambigious instruction forms	2019-01-11 18:26:24 +01:00
Julian Hammer	895a262d5d	Masking instruction duplication mentioned in #24	2019-01-11 16:48:07 +01:00
Julian Hammer	88856eb573	added missing test file	2019-01-11 16:16:11 +01:00
Julian Hammer	880dc332c8	[WIP] added test case and modified port counts to match imported model	2019-01-11 14:36:48 +01:00