JanLJL
9c2f559983
black formatting
2025-03-05 10:20:47 +01:00
JanLJL
02716e7b41
flake8 formatting
2025-03-05 10:19:10 +01:00
pleroy
1a7c1588f6
Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
stefandesouza
38781ecc94
Port pressure returned in tuple with Memory Operand
2024-03-04 20:00:43 +01:00
stefandesouza
1c0708e750
Added updated files
2024-02-27 14:47:55 +01:00
stefandesouza
ec798f61b2
More formatting
2024-01-10 13:26:50 +01:00
stefandesouza
cac4a0ebf2
flake8 standards
2023-12-03 21:04:58 +01:00
stefandesouza
cef7f8098d
Black formatting
2023-12-03 17:22:11 +01:00
stefandesouza
93ae586745
Fixed semantic and marker tests. Now only dump needs to be adjusted
2023-12-03 16:49:33 +01:00
stefandesouza
2c32ccf37a
pre/post-indexed to pre/post_indexed. Now have use ImmediateOperand type for mem offset. Changed some parser tests also
2023-12-02 16:56:43 +01:00
stefandesouza
26d65750a6
Fixed issue with throughput assignment
2023-10-30 19:32:05 +01:00
stefandesouza
ebb973493b
Added condition operand, adjusted tests to parse it & a few changes to get the kernelDG tests working
2023-10-29 16:36:00 +01:00
stefandesouza
14a2aa0b52
Changed style to conform to PEP-8 conventions; Added source and destination attributes to parent Operand class
2023-10-29 13:52:49 +01:00
stefandesouza
33d1eec106
Updated tests to use the now class style iforms in isa_data
2023-10-23 16:25:31 +02:00
stefandesouza
42f96753c1
Black formatting
2023-09-12 12:45:28 +02:00
stefandesouza
a8e5a6ad46
Converting operand types read in from YAML files
2023-09-12 00:23:59 +02:00
stefandesouza
7f4f87d192
Changes for operand matching, instruction loading
2023-09-11 18:23:57 +02:00
stefandesouza
615ef82f04
Changes to accomodate the new OO style
2023-08-28 15:19:46 +02:00
stefandesouza
0a32c77751
Added 2 operand types and made changes for attribute usage
2023-08-20 21:01:44 +02:00
JanLJL
1125e4c5d9
fixed UnboundLocalError if tp assignment loop is not executed
2023-07-17 14:52:22 +02:00
JanLJL
c6ed492db3
fixed read out of store TP from DB
2023-06-20 21:20:41 +02:00
JanLJL
9f715c0ba3
added fallback search in arch/ISA model for ARM instructions with shape/cc suffixes
2023-03-03 15:11:40 +01:00
JanLJL
7c907e2432
bugfix in store throughput calculation
2022-09-28 14:21:46 +02:00
JanLJL
7724ce27c7
added Zen3 support
2022-09-27 18:39:14 +02:00
JanLJL
9c966c2359
small bugfixes
2022-03-17 16:38:28 +01:00
JanLJL
5205cb5cc6
fixed formatting with correct line length
2021-10-04 15:00:17 +02:00
JanLJL
e6ce870ca0
black formatting
2021-10-04 14:33:28 +02:00
JanLJL
d418c16f4a
applied flake8 and black rules
2021-08-26 16:58:19 +02:00
Julian
08440ed5e1
Validation ( #71 )
...
Validating of OSACA predictions for IVB, SKX, ZEN1, ZEN2, A64FX and TX2 with different kernels.
build_and_run.py contains the configuration used at RRZE's testcluster and UR's qpace4, Analysis.ipynb contains the analysis script and results. Raw data from measurements (122MB) will be attached to next OSACA release.
For now, find the raw data here: https://hawo.net/~sijuhamm/d/UPIhBOtz/validation-data.tar.gz
The analysis report can be viewed at https://nbviewer.jupyter.org/github/RRZE-HPC/OSACA/blob/validation/validation/Analysis.ipynb
Quite a few changes on OSACA included:
Feature: register change tracking via semantic understanding of operations
Feature: recording LCD latency along path and exposing this to frontend
Feature: support for memory reference aliases
Feature: store throughput scaling (similar to load throughput scaling)
Fix: model importer works with latest uops.info export
Fix: immediate type tracking on ARM now preserves type in internal representaion
Removed unused KerncraftAPI
2021-04-15 14:42:37 +02:00
Julian Hammer
b7625a4a25
making flake8 happy
2021-03-11 12:29:14 +01:00
Julian Hammer
6204c90934
migrate code style to Black
2021-03-11 12:02:45 +01:00
Julian Hammer
314ff4cf9d
improved performance of arch_semantics and reg dependency matching
2020-11-09 19:27:47 +01:00
Julian Hammer
a2dd6f752d
added comment
2020-11-09 12:35:13 +01:00
Julian Hammer
2fb36406a7
performance improvement of throughput summation
2020-11-09 12:01:00 +01:00
JanLJL
b052ab4151
bugfix in OoO scheduling
2020-07-28 14:52:30 +02:00
JanLJL
6c72281d65
prepared for aarch64 8.2 support
2020-07-23 15:54:54 +02:00
JanLJL
0e77b7bc9a
enhanced TP scheduling
2020-07-06 18:49:46 +02:00
JanLJL
666512d54d
added reg-only fallback for mem-instructions not found in ISA DB
2020-03-10 17:15:57 +01:00
JanLJL
dcd5b8fd61
more documentation
2020-03-05 18:39:38 +01:00
JanLJL
5574a93a5e
made detection of flag dependencies as opt_in for now
2020-01-29 13:03:43 +01:00
JanLJL
2fc1f3a186
added new instructions and fixed false positive assignment of stores by dynamic TP/LT combination for aarch64
2020-01-22 21:40:11 +01:00
JanLJL
b6572720af
enhanced for dynamic ST throughput combination
2020-01-14 10:49:47 +01:00
JanLJL
3ca2586bac
added --ignore-unknown flag and major updates in x86 parser
2020-01-09 17:57:08 +01:00
JanLJL
4d6d8d9379
check for non-GAS-suffix mnemonics for instruction forms with MEM ops
2020-01-09 13:21:11 +01:00
JanLJL
f5b6611474
tiny bugfix for src_dst operands
2020-01-07 19:42:13 +01:00
JanLJL
0fdbb7f52c
bugfix
2019-12-19 18:54:47 +01:00
JanLJL
bad230fa7b
enhanced dynamic combine of LD and arithmetic instr
2019-12-19 18:50:48 +01:00
JanLJL
bbb004a2aa
added default load TP and relocation in identifier
2019-12-18 16:56:20 +01:00
Julian Hammer
f18a48653f
FIX #46 untangled semantic and non-semantic operand info
2019-11-14 16:43:33 +01:00
Julian Hammer
e7838cac54
Merge branch 'master' of github.com:RRZE-HPC/OSACA
2019-11-13 12:52:34 +01:00
