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mirror of https://github.com/RRZE-HPC/OSACA.git synced 2025-12-13 07:30:06 +01:00
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master
OSACA/tests
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JanLJL 45847e69ff formatting for black
2025-08-16 14:13:29 +02:00
..
test_files
take +- operator of offset/index in mem-addr into account
2025-03-14 18:46:12 +01:00
__init__.py
made tests a module
2019-10-25 14:49:21 +02:00
all_tests.py
Validation (#71)
2021-04-15 14:42:37 +02:00
test_base_parser.py
renamed .asm files to .s for consistency
2025-03-05 09:36:07 +01:00
test_cli.py
add test case for specific syntax parameter in get_asm_parser()
2025-03-04 17:45:19 +01:00
test_db_interface.py
moved get_full_instruction_name() from HardwareModel to DBInterface
2024-05-02 16:25:41 +02:00
test_frontend.py
bugfixes
2025-03-04 17:46:37 +01:00
test_marker_utils.py
renamed .asm files to .s for consistency
2025-03-05 09:36:07 +01:00
test_parser_AArch64.py
added support for <Xd>! registers and [<Xd>]! mem addresses in Arm
2025-03-07 11:49:14 +01:00
test_parser_x86att.py
formatting
2024-08-19 15:52:28 +02:00
test_parser_x86intel.py
formatting for black
2025-08-16 14:13:29 +02:00
test_semantics.py
Readying.
2025-03-31 20:48:39 +02:00
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