mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2025-12-16 09:00:05 +01:00
074118dee0
- Modified RISC-V parser to use x-register names instead of ABI names - Added new vector instructions (vsetvli, vle8.v, vse8.v, vfmacc.vv, vfmul.vf) - Added floating point instructions (fmul.d) - Added unconditional jump instruction (j) - Updated tests to match new register naming convention - Added new RISC-V example files - Updated .gitignore to exclude test environment and old examples
261 lines
11 KiB
Python
261 lines
11 KiB
Python
#!/usr/bin/env python3
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"""
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Unit tests for RISC-V assembly parser
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"""
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import os
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import unittest
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from pyparsing import ParseException
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from osaca.parser import ParserRISCV, InstructionForm
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from osaca.parser.directive import DirectiveOperand
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from osaca.parser.memory import MemoryOperand
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from osaca.parser.register import RegisterOperand
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from osaca.parser.immediate import ImmediateOperand
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from osaca.parser.identifier import IdentifierOperand
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class TestParserRISCV(unittest.TestCase):
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@classmethod
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def setUpClass(self):
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self.parser = ParserRISCV()
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with open(self._find_file("kernel_riscv.s")) as f:
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self.riscv_code = f.read()
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##################
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# Test
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##################
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def test_comment_parser(self):
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self.assertEqual(self._get_comment(self.parser, "# some comments"), "some comments")
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self.assertEqual(
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self._get_comment(self.parser, "\t\t# RISC-V comment \t end \t"), "RISC-V comment end"
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)
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self.assertEqual(
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self._get_comment(self.parser, "\t## comment ## comment"),
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"# comment ## comment",
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)
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def test_label_parser(self):
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# Test common label patterns from kernel_riscv.s
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self.assertEqual(self._get_label(self.parser, "saxpy_golden:")[0].name, "saxpy_golden")
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self.assertEqual(self._get_label(self.parser, ".L4:")[0].name, ".L4")
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self.assertEqual(self._get_label(self.parser, ".L25:\t\t\t# Return")[0].name, ".L25")
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self.assertEqual(
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" ".join(self._get_label(self.parser, ".L25:\t\t\t# Return")[1]),
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"Return",
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)
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with self.assertRaises(ParseException):
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self._get_label(self.parser, "\t.word 1113498583")
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def test_directive_parser(self):
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self.assertEqual(self._get_directive(self.parser, "\t.text")[0].name, "text")
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self.assertEqual(len(self._get_directive(self.parser, "\t.text")[0].parameters), 0)
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self.assertEqual(self._get_directive(self.parser, "\t.word\t1113498583")[0].name, "word")
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self.assertEqual(
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len(self._get_directive(self.parser, "\t.word\t1113498583")[0].parameters), 1
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)
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self.assertEqual(
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self._get_directive(self.parser, "\t.word\t1113498583")[0].parameters[0], "1113498583"
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)
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# Test string directive
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self.assertEqual(
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self._get_directive(self.parser, '.string "fail, %f=!%f\\n"')[0].name, "string"
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)
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self.assertEqual(
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self._get_directive(self.parser, '.string "fail, %f=!%f\\n"')[0].parameters[0],
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'"fail, %f=!%f\\n"'
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)
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# Test set directive
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self.assertEqual(
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self._get_directive(self.parser, "\t.set\t.LANCHOR0,. + 0")[0].name, "set"
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)
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self.assertEqual(
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len(self._get_directive(self.parser, "\t.set\t.LANCHOR0,. + 0")[0].parameters), 2
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)
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def test_parse_instruction(self):
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"""Test parsing of instructions."""
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# Test 1: Simple instruction
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parsed_1 = self.parser.parse_instruction("addi x10, x10, 1")
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self.assertEqual(parsed_1.mnemonic, "addi")
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self.assertEqual(len(parsed_1.operands), 3)
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self.assertEqual(parsed_1.operands[0].name, "10")
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self.assertEqual(parsed_1.operands[1].name, "10")
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self.assertEqual(parsed_1.operands[2].value, 1)
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# Test 2: Vector instruction
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parsed_2 = self.parser.parse_instruction("vle64.v v1, (x11)")
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self.assertEqual(parsed_2.mnemonic, "vle64.v")
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self.assertEqual(len(parsed_2.operands), 2)
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self.assertEqual(parsed_2.operands[0].name, "1")
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self.assertEqual(parsed_2.operands[1].base.name, "11")
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# Test 3: Floating point instruction
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parsed_3 = self.parser.parse_instruction("fmul.d f10, f10, f11")
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self.assertEqual(parsed_3.mnemonic, "fmul.d")
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self.assertEqual(len(parsed_3.operands), 3)
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self.assertEqual(parsed_3.operands[0].name, "10")
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self.assertEqual(parsed_3.operands[1].name, "10")
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self.assertEqual(parsed_3.operands[2].name, "11")
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def test_parse_line(self):
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"""Test parsing of complete lines."""
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# Test 1: Line with label and instruction
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parsed_1 = self.parser.parse_line(".L2:")
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self.assertEqual(parsed_1.label, ".L2")
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# Test 2: Line with instruction and comment
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parsed_2 = self.parser.parse_line("addi x10, x10, 1 # increment")
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self.assertEqual(parsed_2.mnemonic, "addi")
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self.assertEqual(len(parsed_2.operands), 3)
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self.assertEqual(parsed_2.operands[0].name, "10")
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self.assertEqual(parsed_2.operands[1].name, "10")
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self.assertEqual(parsed_2.operands[2].value, 1)
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self.assertEqual(parsed_2.comment, "increment")
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def test_parse_file(self):
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parsed = self.parser.parse_file(self.riscv_code)
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self.assertGreater(len(parsed), 10) # There should be multiple lines
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# Find common elements that should exist in any RISC-V file
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# without being tied to specific line numbers
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# Verify that we can find at least one label
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label_forms = [form for form in parsed if form.label is not None]
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self.assertGreater(len(label_forms), 0, "No labels found in the file")
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# Verify that we can find at least one branch instruction
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branch_forms = [form for form in parsed if form.mnemonic and form.mnemonic.startswith("b")]
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self.assertGreater(len(branch_forms), 0, "No branch instructions found in the file")
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# Verify that we can find at least one store/load instruction
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mem_forms = [form for form in parsed if form.mnemonic and (
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form.mnemonic.startswith("s") or
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form.mnemonic.startswith("l"))]
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self.assertGreater(len(mem_forms), 0, "No memory instructions found in the file")
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# Verify that we can find at least one directive
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directive_forms = [form for form in parsed if form.directive is not None]
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self.assertGreater(len(directive_forms), 0, "No directives found in the file")
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def test_register_dependency(self):
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# Test ABI name to register number mapping
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reg_zero = RegisterOperand(name="zero")
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reg_ra = RegisterOperand(name="ra")
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reg_sp = RegisterOperand(name="sp")
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reg_a0 = RegisterOperand(name="a0")
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reg_t1 = RegisterOperand(name="t1")
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reg_s2 = RegisterOperand(name="s2")
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reg_x0 = RegisterOperand(prefix="x", name="0")
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reg_x1 = RegisterOperand(prefix="x", name="1")
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reg_x2 = RegisterOperand(prefix="x", name="2")
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reg_x5 = RegisterOperand(prefix="x", name="5") # Define reg_x5 for use in tests below
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reg_x10 = RegisterOperand(prefix="x", name="10")
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reg_x6 = RegisterOperand(prefix="x", name="6")
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reg_x18 = RegisterOperand(prefix="x", name="18")
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# Test canonical name conversion
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self.assertEqual(self.parser._get_canonical_reg_name(reg_zero), "x0")
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self.assertEqual(self.parser._get_canonical_reg_name(reg_ra), "x1")
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self.assertEqual(self.parser._get_canonical_reg_name(reg_sp), "x2")
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self.assertEqual(self.parser._get_canonical_reg_name(reg_a0), "x10")
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self.assertEqual(self.parser._get_canonical_reg_name(reg_t1), "x6")
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self.assertEqual(self.parser._get_canonical_reg_name(reg_s2), "x18")
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# Test register dependency
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self.assertTrue(self.parser.is_reg_dependend_of(reg_zero, reg_x0))
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self.assertTrue(self.parser.is_reg_dependend_of(reg_ra, reg_x1))
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self.assertTrue(self.parser.is_reg_dependend_of(reg_sp, reg_x2))
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self.assertTrue(self.parser.is_reg_dependend_of(reg_a0, reg_x10))
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self.assertTrue(self.parser.is_reg_dependend_of(reg_t1, reg_x6))
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self.assertTrue(self.parser.is_reg_dependend_of(reg_s2, reg_x18))
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# Test non-dependent registers
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self.assertFalse(self.parser.is_reg_dependend_of(reg_zero, reg_x1))
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self.assertFalse(self.parser.is_reg_dependend_of(reg_ra, reg_x2))
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self.assertFalse(self.parser.is_reg_dependend_of(reg_a0, reg_t1))
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# Test floating-point registers
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reg_fa0 = RegisterOperand(prefix="f", name="a0")
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reg_fa1 = RegisterOperand(prefix="f", name="a1")
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reg_f10 = RegisterOperand(prefix="f", name="10")
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# Test vector registers
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reg_v1 = RegisterOperand(prefix="v", name="1")
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reg_v2 = RegisterOperand(prefix="v", name="2")
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# Test register type detection
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self.assertTrue(self.parser.is_gpr(reg_a0))
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self.assertTrue(self.parser.is_gpr(reg_x5))
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self.assertTrue(self.parser.is_gpr(reg_sp))
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self.assertFalse(self.parser.is_gpr(reg_fa0))
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self.assertFalse(self.parser.is_gpr(reg_f10))
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self.assertTrue(self.parser.is_vector_register(reg_v1))
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self.assertFalse(self.parser.is_vector_register(reg_x10))
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self.assertFalse(self.parser.is_vector_register(reg_fa0))
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def test_normalize_imd(self):
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imd_decimal = ImmediateOperand(value="42")
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imd_hex = ImmediateOperand(value="0x2A")
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imd_negative = ImmediateOperand(value="-12")
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identifier = IdentifierOperand(name="function")
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self.assertEqual(self.parser.normalize_imd(imd_decimal), 42)
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self.assertEqual(self.parser.normalize_imd(imd_hex), 42)
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self.assertEqual(self.parser.normalize_imd(imd_negative), -12)
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self.assertEqual(self.parser.normalize_imd(identifier), identifier)
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def test_memory_operand_parsing(self):
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"""Test parsing of memory operands."""
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# Test 1: Basic memory operand
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parsed1 = self.parser.parse_instruction("vle8.v v1, (x11)")
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self.assertEqual(parsed1.mnemonic, "vle8.v")
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self.assertEqual(len(parsed1.operands), 2)
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self.assertEqual(parsed1.operands[0].name, "1")
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self.assertEqual(parsed1.operands[1].base.name, "11")
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self.assertEqual(parsed1.operands[1].offset, None)
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self.assertEqual(parsed1.operands[1].index, None)
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# Test 2: Memory operand with offset
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parsed2 = self.parser.parse_instruction("vle8.v v1, 8(x11)")
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self.assertEqual(parsed2.mnemonic, "vle8.v")
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self.assertEqual(len(parsed2.operands), 2)
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self.assertEqual(parsed2.operands[0].name, "1")
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self.assertEqual(parsed2.operands[1].base.name, "11")
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self.assertEqual(parsed2.operands[1].offset.value, 8)
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self.assertEqual(parsed2.operands[1].index, None)
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##################
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# Helper functions
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##################
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def _get_comment(self, parser, comment):
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return " ".join(
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parser.process_operand(parser.comment.parseString(comment, parseAll=True).asDict())[
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"comment"
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]
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)
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def _get_label(self, parser, label):
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return parser.process_operand(parser.label.parseString(label, parseAll=True).asDict())
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def _get_directive(self, parser, directive):
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return parser.process_operand(
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parser.directive.parseString(directive, parseAll=True).asDict()
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)
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@staticmethod
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def _find_file(name):
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testdir = os.path.dirname(__file__)
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name = os.path.join(testdir, "test_files", name)
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assert os.path.exists(name)
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return name
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if __name__ == "__main__":
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suite = unittest.TestLoader().loadTestsFromTestCase(TestParserRISCV)
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unittest.TextTestRunner(verbosity=2).run(suite) |