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Author SHA1 Message Date
Julian Hammer
7da2f5bd7b fixed output redirection 2021-03-11 12:17:46 +01:00
Julian Hammer
6158a83b4f added blame ignore file 2021-03-11 12:03:40 +01:00
Julian Hammer
6204c90934 migrate code style to Black 2021-03-11 12:02:45 +01:00
Julian Hammer
1ebe5ecfbd sanity check validity of operand entries 2021-03-11 11:38:25 +01:00
Julian Hammer
0c5ac26f3f fixed typos and added missing default load/store info 2021-03-11 10:10:09 +01:00
JanLJL
9a13e5cbc5 guarantee 0 latency for None values in DB 2021-03-11 01:55:57 +01:00
Julian Hammer
dcf3e38612 fix #66 typo in icl.yml 
cmp failed with immediates
 2021-03-10 11:57:21 +01:00
Jan
09a14465c1 Merge pull request #65 from RRZE-HPC/throw_parsing_error 
passing parsing errors to the outside
 2021-03-08 09:38:24 +01:00
Julian Hammer
d7a687909e passing parsing errors to the outside 2021-03-05 18:07:36 +01:00
JanLJL
f8d53a69d7 changed test after adjustment in parser 2021-02-25 08:12:10 +01:00
JanLJL
74a479fb95 fixed AArch64 parser for register shifts and new instructions for A64FX 2021-02-25 07:43:42 +01:00
Julian Hammer
4fdf312622 add "sub gpr, gpr" to skx 2021-02-15 11:41:21 +01:00
Julian Hammer
803da767f2 add "vmovapd zmm, zmm" to skx 2021-02-15 11:41:20 +01:00
JanLJL
0e69db9de9 new instructions 2021-01-31 18:11:06 +01:00
JanLJL
9f87606ce8 minor model fixes 2021-01-26 12:56:19 +01:00
JanLJL
768a90de10 cover kernel with only unknown instructions 2021-01-07 12:40:16 +01:00
Jan
8c9557760e Merge pull request #62 from jdomke/attfix 
att parser: workaround for crash with "jg,pt" mnemonic
For now we will ignore the branch taken/not-taken indication and will only keep the condition in the mnemonic.
 2021-01-07 10:23:39 +01:00
Jan
4dbcfbda5d suppress branch indication in mnemonic for now 2021-01-07 10:20:57 +01:00
JanLJL
ed13cde61b fixed DV port bug 2021-01-07 09:59:18 +01:00
jdomke
4f8ed13309 att parser: support for more mnemonic 
found some 'jg,pt' in icc/mkl generated binaries which crashed the
parser, here an example:
 dd8ccd:   3e 7f 90   jg,pt  dd8c60 <mkl_blas_avx2_dtrsm_kernel...
 2021-01-05 15:26:22 +09:00
JanLJL
3c7971b347 fixes #61 2020-12-28 10:33:54 +01:00
Jan
d89a742718 Changed badge target to GH Actions 2020-12-18 14:13:26 +01:00
Julian Hammer
05fdbcf060 updated travis badge to gh action 2020-12-18 14:13:26 +01:00
Julian Hammer
0f86d2d1b2 disabled py35 with tox 2020-12-18 14:13:26 +01:00
Julian Hammer
dff86d456e configured flake8 max-line-length 2020-12-18 14:13:26 +01:00
Julian Hammer
77e7c3a520 thrid wheel was to much 2020-12-18 14:13:26 +01:00
Julian Hammer
ba957877e3 merged test and publish again 2020-12-18 14:13:26 +01:00
Julian Hammer
1d52362306 added missing runs-on 2020-12-18 14:13:26 +01:00
Julian Hammer
dd37a21c56 installing libgraphviz-dev 2020-12-18 14:13:26 +01:00
Julian Hammer
0bdc180a52 installing graphviz 2020-12-18 14:13:26 +01:00
Julian Hammer
f6a02a8f3e enabling gh_actions 2020-12-18 14:13:26 +01:00
JanLJL
60f792c4b2 new instructions 2020-12-17 12:38:58 +01:00
Git out :V
12044e3ac4 Initial support for the Cortex-A72 (Raspberry Pi 4) 2020-12-16 18:49:16 +01:00
Git out :V
8454edef73 Data for creating A72 model 
Add PMEvo mapping from
https://github.com/cdl-saarland/pmevo-artifact/blob/master/vm_setup/data/A72/mapping_pmevo.json
together with a template file to allow generating an OSACA model for the
A72.
 2020-12-16 18:48:55 +01:00
Git out :V
9165306808 PMEvo port mapping to OSACA model converter script 
Tool for semi-automatically creating an OSACA model using a PMEvo port
mapping, optionally using asmbench to measure latency and throughput,
which otherwise are not available in the port mapping.

This is only designed to handle AArch64 architectures, in particular the
Cortex-A72, used on the Raspberry Pi 4. Usefulness for other models may
be limited.
 2020-12-16 18:47:49 +01:00
JanLJL
449932d75b version bump v0.3.14 2020-12-11 01:00:30 +01:00
Jan
c68ad48e6b Update README.rst 2020-12-11 00:58:34 +01:00
JanLJL
8e3d613843 new instructions 2020-12-09 11:52:10 +01:00
JanLJL
2093610bbf add support for :: delimiter in x86 labels and identifiers 2020-12-07 02:45:49 +01:00
JanLJL
f9f1120da6 added support for absolute address operands without brackets 2020-12-07 01:57:06 +01:00
JanLJL
e87ab5d6ca new instruction 2020-12-07 01:18:32 +01:00
JanLJL
82b35e7649 new instruction 2020-12-07 01:18:32 +01:00
JanLJL
23623ca18a enhancements for lookup and parsing AArch64 instrs 2020-12-07 01:18:32 +01:00
JanLJL
b9e434d124 new instructions 2020-12-07 01:18:32 +01:00
JanLJL
0e47034c8b Merge branch 'master' of https://github.com/RRZE-HPC/OSACA 2020-12-06 18:06:36 +01:00
JanLJL
81ce395115 added the possibility of a 5th operand 2020-12-06 18:05:59 +01:00
JanLJL
f41854a0a6 better port order and a few new instructions 2020-12-06 18:05:36 +01:00
Julian
818b516289 Update README.rst 2020-11-23 11:27:35 +01:00
JanLJL
d7e5e12961 version bump v0.3.13 2020-11-23 10:43:00 +01:00
JanLJL
6bc6349c25 fetch version from __init__ file and write uarch in upper case 2020-11-21 21:33:33 +01:00