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Author	SHA1	Message	Date
Anson Mansfield	e0a9b7023b	py/objcode: Remove mp_obj_code_t.lnotab field from v2 preview. ... This field exists to cache the lnotab field removed from v2 in #17639 by ddf2c3afb1, and is now unused. Signed-off-by: Anson Mansfield <amansfield@mantaro.com>	2025-11-03 14:02:55 +11:00
Alessandro Gatti	3cd95dda64	py/asmrv32: Generate better comparison sequences. ... This commit changes the sequences generated for not-equal and less-than-or-equal comparisons, in favour of better replacements. The new not-equal comparison generates a sequence of equal size but without the burden of a jump to set the output value, this also had the effect of reducing the size of the code generator as only two opcodes need to be generated instead of three. The less-than-or-equal sequence, on the other hand, is actually two bytes shorter and does not contain any jumps. If Zcb opcodes can be used for performing the final XOR operation then two more bytes could be saved on each comparison. The same remarks about having a shorter generator due to two opcodes being generated instead of three still applies here. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-11-03 13:53:45 +11:00
Alessandro Gatti	a1684ad2c1	py/asmrv32: Refactor register-indexed load/store emitters. ... This commit shortens register-indexed load/store emitter functions, by reusing integer-indexed equivalent operations as part of the sequence generation process. Before these changes, register-indexed load/store emitters would follow two steps to generate the sequence: generate opcodes to fix up the register offset to make it point to the exact position in memory where the operation should take place, and then perform the load/store operation itself using 0 as an offset from the recalculated address register. Since there is already a generic optimised emitter for integer-indexed load/stores, that bit of code can be reused rather than having an ad-hoc implementation that is tailored to operate on an offset of 0. Removing the custom emitter code in favour of calling the general integer-indexed emitter saves around 150 bytes without any changes in the emitter behaviour (generating the same opcode sequence and making use of future improvement in that emitter too). Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-11-03 13:21:46 +11:00
Alessandro Gatti	385e4f3d0c	py/emitinlinerv32: Refactor load/store opcodes validation. ... This commit minimises the amount of code required to perform validation of load/store opcodes, streamlining their validation and serialisation. Load/store opcodes used to be handled as a special case due to how its peculiar syntax yields parse node arguments that cannot be handled by the regular validation and serialisation functions. The changes in this commit attempt to reduce the amount of special code needed for those opcodes to its bare minimum, by removing the special opcode handling step, merging the validation and serialisation pass for the combined offset + base register operand, and integrate said changes in the existing argument handling structure. That allowed to rework the special operand parsing function to make it smaller, and remove the code that performed the special case validation and emitted the opcode. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-11-03 12:39:01 +11:00
Alessandro Gatti	3da529554d	py/emitinlinerv32: Refactor opcode arguments validation. ... This commit simplifies the way arguments are validated when processing RV32 inline assembler opcodes. Opcode arguments were handled in two separate passes, one that performed a pure validation (with an early rejection in case of errors), and another that converted the parse node into a serialised value but without any error checking. Considering that the validation pass effectively performed the parse node conversion and then discarded its result once validated, it is preferable to hold onto the serialised result to reuse it later at opcode generation time. With these changes, those two passes are merged into one single operation when applicable (basically any opcode that doesn't use an integer offset), removing a fair amount of duplicate code. The size savings should be around half a kilobyte, with no other changes in the assembler's behaviour. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-11-03 12:39:01 +11:00
Andrew Leech	27b7bf36a3	stm32/usb: Add VBUS sensing configuration for TinyUSB on F4/F7. ... TinyUSB's `dwc2_phy_init()` only sets the PWRDWN bit in the GCCFG register but doesn't configure VBUS sensing, which is required for the DWC2 USB controller to detect host connection on STM32F4 and STM32F7 series. Without VBUS sensing configured, USB devices fail to enumerate on these platforms when using the TinyUSB stack, while the legacy STM32 USB stack works because it includes this configuration. This commit adds VBUS sensing configuration in `pyb_usbd_init()` for TinyUSB mode on STM32F4/F7: - When VBUS detect pin is configured (typically PA9): Enable "B device" VBUS sensing (USB_OTG_GCCFG_VBUSBSEN) - When no VBUS pin: Force VBUS valid (USB_OTG_GCCFG_NOVBUSSENS) Tested on: - NUCLEO-F429ZI: USB now enumerates successfully (CDC + MSC) - NUCLEO-H563ZI: No regression (STM32H5 uses different register layout) Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>	2025-10-31 10:54:33 +11:00
Andrew Leech	faae8e73ef	stm32/usb: Add TinyUSB Mass Storage support. ... Implements USB MSC functionality for STM32 port when using TinyUSB stack, supporting both internal Flash and SD card storage mediums. Signed-off-by: Andrew Leech <andrew@alelec.net>	2025-10-31 10:54:07 +11:00
Andrew Leech	9bb266e311	stm32/usb: Add support for using TinyUSB stack. ... This commit adapts the stm32 port to allow switching from STM USB stack to TinyUSB stack. Using TinyUSB improves consistancy with other MicroPython ports and brings in the ability to use the runtime USB definition support recently added to other TinyUSB based ports. By default the existing STM USB stack is used. TinyUSB can be enabled in a board configuration with: #define MICROPY_HW_TINYUSB_STACK (1) Or, it can be enabled from the command line with: make -C ports/stm32 CFLAGS_EXTRA='-DMICROPY_HW_TINYUSB_STACK=1' Signed-off-by: Andrew Leech <andrew@alelec.net>	2025-10-31 10:52:11 +11:00
Andrew Leech	6b0e1c2701	shared/runtime/pyexec: Remove legacy USB IRQ enable code. ... It's very STM32 USB stack specific and doesn't generalise well to other ports. So remove it. Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>	2025-10-31 10:51:07 +11:00
ennyKey	4efc5e12b9	stm32/machine_uart: Implement TX/RX inversion parameter for UART on H7. ... Implemented the keyword-only parameter `invert` for the `UART.init` method in accordance with the docs: - added constants `UART.INV_TX` and `UART.INV_RX` - added the new `invert` keyword parameter to the `uart_init` function - adapted the `uart_init` call - added invert setting to `uart_print` output The feature applies only to STM32H7. Signed-off-by: ennyKey <ennyKey@fn.de>	2025-10-30 12:30:26 +11:00
Yuuki NAGAO	e58425a513	stm32/boards: Add NUCLEO-U5A5ZJ-Q board support. ... This change adds NUCLEO-U5A5ZJ-Q support to the STM32 port. NUCLEO-U5A5ZJ-Q: https://www.st.com/ja/evaluation-tools/nucleo-u5a5zj-q.html This board use STM32U5A5ZJ: https://www.st.com/ja/microcontrollers-microprocessors/stm32u5a5zj.html Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>	2025-10-30 07:38:27 +09:00
Yuuki NAGAO	d20d19783d	stm32: Add STM32U5 support. ... This change adds STM32U5 support to the STM32 port. STM32U5A5ZJ: https://www.st.com/ja/microcontrollers-microprocessors/stm32u5a5zj.html Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>	2025-10-30 07:38:18 +09:00
Andrew Leech	673524f55d	lib/stm32lib: Update N6, U5 & WB. ... Added STM32N6 with HAL1.2.0 Added STM32U5 with HAL1.8.0 Updated STM32WB from HAL1.10.0 to HAL1.23.0 Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>	2025-10-27 13:44:56 +11:00
Craftzman7	6773051b5a	rp2/boards: Add missing RP2350 RISC-V variants. ... There are multiple RP2350 boards missing RISC-V builds. Some were missing entries in their `board.json` or a CMake file altogether. This commit fixes them. Signed-off-by: Craftzman7 <zezetta@icloud.com>	2025-10-25 23:25:40 +11:00
robert-hh	72e67f0f02	samd/machine_bitstream: Tune ticks for SAMD51 and set pin to output. ... Changes in this commit: - Change ticks overhead value for SAMD51. The value was too large and thus timing was quite bad. At 120Mhz it's now within +/- 30ns. - Set the pin to output mode. That way, all Pin identifiers are accepted as argument, not only Pin objects. Tested with ItsyBitsy M4 and M0 boards. Signed-off-by: robert-hh <robert@hammelrath.com>	2025-10-25 22:56:47 +11:00
Jeff Epler	2e74f0b6be	py/objlist: Make a small code size optimization in mp_quicksort. ... While clarifying the meaning of the arguments to `mp_quicksort`, I noticed that by pre-adjusting the `head` argument similar to what was already done for `tail`, code size could be saved by eliminating repeated calculation of `h + 1`. Signed-off-by: Jeff Epler <jepler@unpythonic.net>	2025-10-25 22:53:56 +11:00
Alessandro Gatti	a080585ffd	tests/ports/qemu: Add arch flags MPY import checks test. ... This commit introduces a test file (along with its necessary data) to test MPY files pass/reject cases, due to either mismatching architecture flag requirements or unneeded "no-flags" values set. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 19:13:15 +02:00
Alessandro Gatti	849c67bcdc	tests/run-tests.py: Pass auto-detected architecture flags to mpy-cross. ... This commit lets "run-tests.py" use the encoded architecture flags provided by the interpreter when invoking "mpy-cross". If architecture flags are detected, they're mapped into the necessary strings needed by "mpy-cross"'s "-march-flags" argument, so that tests will always use all available extensions reported by the target. Currently this is limited to the RV32 platform, as it is the only one that is making use of this facility as of now. This also lets the QEMU port remove forced arguments to "mpy-cross" when running the test suite. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 19:13:15 +02:00
Alessandro Gatti	331a5c46aa	tests/micropython: Extend MPY import tests for RV32. ... This commit extends the "micropython/import_mpy_native_gc" test with a pre-built serialised MPY file built for RV32. Before this commit, the test was skipped on said platform due to the lack of a known-good MPY file to test the import procedure against. Now the test is executed as part of the general CI test checks. The MPY file's Makefile script was also updated to cater for modern Linux environments where the required Python interpreter's command name isn't "python", but "python3" instead (this occurs when using the past two LTS Ubuntu releases for example). This is the same kind of change made in 31a008c6e2. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 19:13:15 +02:00
Alessandro Gatti	430837996b	py/modsys: Add architecture flags to MicroPython metadata. ... This commit adds the currently supported architecture flags value as the upper part of "sys.implementation._mpy". This had the side effect of perturbing quite a bit of testing infrastructure and invalidating documentation related to MPY files. To make the test suite run successfully and keep the documentation in sync the following changes have been made: * The target info feature check file now isolates eventual architecture flags and adds them as a separate field * The test runner now picks up the new architecture flags field, reports it to STDOUT if needed and stores it for future uses * Relevant test files for MPY files import code had to be updated to mask out the architecture flags bits in order to perform correctly * MPY file format documentation was updated to show how to mask off and properly display the architecture flags information. This works out of the box if the flag bits can fit in a smallint value once merged with the MPY file header value. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 19:13:15 +02:00
Alessandro Gatti	3e2b41f8f6	mpy-cross/main: Parse raw integer arch flags values too. ... This commit extends "mpy-cross"'s parsing of the architecture flags value command line, allowing raw integer values as well as flag strings. Integers can be represented as either decimal, binary, or hexadecimal values, using the usual C language prefixes to mark non-base 10 values. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 19:13:15 +02:00
Alessandro Gatti	b255224d09	tools/mpy-tool.py: Add architecture flags to disassembly output. ... This commit extends "mpy-tool.py"'s disassembly output of a given MPY file (triggered via the "-d" command line option) to include newly added fields. Now the target architecture for the chosen MPY file is printed out to screen in human-readable format and, if present, architecture-specific flags. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 18:31:05 +02:00
Alessandro Gatti	64971f1a65	py/persistentcode: Add architecture flags check for RV32 platforms. ... This commit introduces the MPY architecture flags checking code specific for the RV32 target, currently checking for the only additional extension that is supported by the runtime: Zba. The warnings inside "mpy-cross" have also been removed since now there is a way to reject incompatible MPY files at runtime. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 18:30:55 +02:00
Alessandro Gatti	a6bc1ccbe5	py/persistentcode: Add architecture flags compatibility checks. ... This commit extends the MPY file format in a backwards-compatible way to store an encoded form of architecture-specific flags that have been specified in the "mpy-cross" command line, or that have been explicitly set as part of a native emitter configuration. The file format changes are as follows: * The features byte, previously containing the target native architecture and the minor file format version, now claims bit 6 as a flag indicating the presence of an encoded architecture flags integer * If architecture flags need to be stored, they are placed right after the MPY file header. This means that properly-written MPY parsers, if encountering a MPY file containing encoded architecture flags, should raise an error since no architecture identifiers have been defined that make use of bits 6 and 7 in the referenced header byte. This should give enough guarantees of backwards compatibility when this feature is used (improper parsers were subjected to breakage anyway). The encoded architecture flags could have been placed at the end, but: * Having them right after the header makes the architecture compatibility checks occur before having read the whole file in memory (which still happens on certain platforms as the reader may be backed by a memory buffer), and prevents eventual memory allocations that do not take place if the module is rejected early * Properly-written MPY file parsers should have checked the upper two bits of the flags byte to be actually zero according to the format specification available right before this change, so no assumptions should have been made on the exact order of the chunks for an unexpected format. The meaning of the architecture flags value is backend-specific, with the only common characteristic of being a variable-encoded unsigned integer for the time being. The changes made to the file format effectively limit the number of possible target architectures to 16, of which 13 are already claimed. There aren't that many new architectures planned to be supported for the lifetime of the current MPY file format, so this change still leaves space for architecture updates if needed. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>	2025-10-24 16:32:53 +02:00
Yuuki NAGAO	7373338fa9	stm32/boards/NUCLEO_H7A3ZI_Q: Add NUCLEO_H7A3ZI_Q board support. ... This change adds NUCLEO_H7A3ZI_Q Core Board support to the STM32 port. NUCLEO_H7A3ZI_Q: https://www.st.com/en/evaluation-tools/nucleo-h7a3zi-q.html This board uses STM32H7A3ZI: https://www.st.com/en/microcontrollers-microprocessors/stm32h7a3zi.html Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>	2025-10-24 23:53:58 +11:00
Yuuki NAGAO	a9d04ed0a2	stm32/usbd_conf: Change USB pin configuration for STM32H7A3. ... STM32H7A3 uses PA11, PA12 to enable USB function via built-in USB OTG port on NUCLEO board. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>	2025-10-24 23:53:39 +11:00
Yuuki NAGAO	dbcfec7df8	stm32/adc: Use macros defined by HAL for H7. ... For STM32H7, the following macro's value are different by ADC's version: * ADC_CAL_ADDRESS * ADC_CAL1 * TEMPSENSOR_CAL2_ADDR Using macros defined by HAL become less dependent on ADC's version. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>	2025-10-24 23:53:16 +11:00
Yuuki NAGAO	842657a0b8	stm32/flash: Change Flash sector size for STM32H7A3. ... STM32H7A3 has 2MB internal flash and each sector size is 8KB. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>	2025-10-24 23:53:10 +11:00
Kwabena W. Agyeman	3808ccd522	stm32/boards: Add missing AF options to N6 AF file. ... Signed-off-by: Kwabena W. Agyeman <kwagyeman@live.com>	2025-10-24 23:24:05 +11:00
iabdalkader	62cf07540c	stm32/boards/OPENMV_N6: Fix float implementation. ... 32-bit floats are needed for object representation C. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 18:46:34 +11:00
stijn	d05f32f1eb	windows/msvc: Make the PP defs for manifest freezing global. ... This is consistent with the other ports (see py/mkrules.mk) and makes more sense overall because it makes everything which is compiled use the same flags; until now all compilation steps which ran before or in absence of FreezeModules (e.g. qstr generation, compiling a single file on the command line or in the IDE) would use different PP defs. This didn't happen to cause any issues apparently but it's just more consistent/safer to not do that. Signed-off-by: stijn <stijn@ignitron.net>	2025-10-24 18:01:13 +11:00
iabdalkader	15401a3ae8	tools/mpremote: Fix exception when using pts. ... Setting RTS/DTR raises "Inappropriate ioctl for device" for pts devices. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:51 +11:00
iabdalkader	28919abb17	qemu/boards: Add new MPS3_AN547 board definition. ... This is a Cortex-M55 board. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:51 +11:00
iabdalkader	557290f49d	qemu/mcu/arm: Enable the FPU init for ARMv8-M. ... Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:51 +11:00
iabdalkader	debac3e3bd	qemu/uart: Fix UART0 address for MPS3. ... Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:51 +11:00
iabdalkader	0cf1a58c3d	qemu/mpconfigport: Enable time, select and stdio buffer. ... Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:51 +11:00
iabdalkader	7ca70edae7	qemu/mphalport: Implement stdin poll and mp-hal ticks functions. ... Using the newly added `uart_rx_any()` and system ticks functions. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:51 +11:00
iabdalkader	abbe883c07	qemu/mcu/riscv: Implement ticks using the RDTIME control register. ... Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:47 +11:00
iabdalkader	e1f063a1fa	qemu/mcu/arm: Implement a SysTick driver. ... Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:31:43 +11:00
iabdalkader	c04d2d691c	qemu/uart: Implement uart_rx_any function. ... So it can be used for polling. Signed-off-by: iabdalkader <i.abdalkader@gmail.com>	2025-10-24 17:27:25 +11:00
Daniël van de Giessen	be4892097e	tools/autobuild: Use same length Git hash abbreviation in file names. ... This makes the version string consistent with the one used in code, see commit 9e89c752cb. Signed-off-by: Daniël van de Giessen <daniel@dvdgiessen.nl>	2025-10-23 16:23:56 +11:00
Jeff Epler	6f4fd6aed9	tools/ci.sh: Use a better default reference ref in code_size_build. ... Now the default reference commit is the first parent of the selected commit, instead of the first parent of HEAD. Signed-off-by: Jeff Epler <jepler@unpythonic.net>	2025-10-23 16:16:44 +11:00
Jeff Epler	3bea897073	tools/metrics.py: Tersely show the commits in the size report. ... This will show a line for both the reference and comparison, e.g., Reference: zephyr/boards: Add PocketBeagle 2 rev A1… [00a926e99e] Comparison: metrics: Tersely show the commi… [merge of c7ac411e22] When the comparison is a merge commit (as it is during CI) the second parent of that commit is shown instead. This will be helpful when checking which revision of the code size report comment on a PR corresponds to which revision of the code. Signed-off-by: Jeff Epler <jepler@unpythonic.net>	2025-10-23 16:15:26 +11:00
Jeff Epler	2af0c52a91	lib/libm_dbl: Allow building when DBL_EPSILON is defined in <float.h>. ... This is the case in arm-none-eabi-gcc 14.2.1 (debian trixie). This fixes a diagnostic like: ../../lib/libm_dbl/libm.h:92:9: error: "DBL_EPSILON" redefined [-Werror] /usr/lib/gcc/arm-none-eabi/14.2.1/include/float.h:114:9: note: this is the location of the previous definition when building MPS2_AN500 (qemu port). Signed-off-by: Jeff Epler <jepler@unpythonic.net>	2025-10-23 15:17:37 +11:00
Jeff Epler	007f127a61	all: Simplify mp_int_t/mp_uint_t definition. ... Assuming proper C99 language support, we can select "the int type as big as a pointer" (most of the time) or "the 64-bit int type" (nanboxing with REPR_D), and then define everything else automatically. This simplifies port configuration files. And the types can still be overridden if needed. Signed-off-by: Jeff Epler <jepler@unpythonic.net>	2025-10-23 15:12:28 +11:00
Jeff Epler	eac81de4e0	tools/ci.sh: Cross build 64-bit windows on Linux. ... Signed-off-by: Jeff Epler <jepler@unpythonic.net>	2025-10-23 15:07:17 +11:00
Damien George	0e1d857f80	README: Define and describe the port Tier levels. ... MicroPython has quite a few ports now (20 of them), but not all are in the same stage of development. This commit attempts to define port Tier levels and assign a Tier to each of the existing ports. The main aim here is to set expectations for the level of support and development each port gets. And also lower the bar of entry for new ports so they can enter at a low Tier and gradually rise up to Tier 1. See prior art here: - https://peps.python.org/pep-0011/ - https://doc.rust-lang.org/rustc/target-tier-policy.html - https://docs.zephyrproject.org/latest/project/release_process.html#hardware-support-tiers Signed-off-by: Damien George <damien@micropython.org> Signed-off-by: Angus Gratton <angus@redyak.com.au>	2025-10-23 11:23:17 +11:00
Ned Konz	2082a4d189	zephyr/boards: Add NXP MIMXRT1020 EVK board. ... This board has plenty of RAM, flash, and peripherals, including Ethernet. It also has a microSD slot, which also works. Access to the REPL is via UART1, which is available via the DAPLink connector J23. Signed-off-by: Ned Konz <ned@metamagix.tech>	2025-10-22 15:30:27 +11:00
Ned Konz	7bb78fb6df	zephyr/boards: Add XIAO BLE NRF52840 SENSE board. ... This commit adds Zephyr support for the XIAO BLE NRF52840 SENSE board from Seeed Studio. It also provides a good example of a richer Zephyr port than the default, adding: - Frozen modules (including asyncio, upysh, aioble and aiorepl). - Enough MicroPython features to support using aioble (at least for the `temp_sensor.py` example). - JSON, random, re, struct, etc. Signed-off-by: Ned Konz <ned@metamagix.tech>	2025-10-22 15:00:35 +11:00
Ned Konz	4c11f64faa	zephyr: Add erase block size to FlashArea.areas entries. ... This commit changes the values in the `FlashArea.areas` dictionary from simple integer IDs to (ID, erase-block-size) tuples. `_boot.py` was changed to use the newly available erase block size. Signed-off-by: Ned Konz <ned@metamagix.tech>	2025-10-22 10:24:32 +11:00