Julian Hammer
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36acf413e3
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added a few instructions and hidden_operands
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2020-01-16 16:49:02 +01:00 |
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Julian Hammer
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91b0d27cc2
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fixed typo in yml string template
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2020-01-16 15:31:35 +01:00 |
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Julian Hammer
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48ff0bb3f3
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added generated mov information to all intel uarchs
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2020-01-16 15:19:46 +01:00 |
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Julian Hammer
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f535bd5bd8
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also added pmovs and updated some port numbers
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2020-01-16 15:10:41 +01:00 |
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Julian Hammer
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32e3c1fb3e
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Merge branch 'master' of github.com:RRZE-HPC/OSACA
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2020-01-16 13:28:37 +01:00 |
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Julian Hammer
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c0418d113c
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added mov generation script
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2020-01-16 13:28:16 +01:00 |
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Jan
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aa0b636add
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fixed broken build pipeline badge
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2020-01-16 07:52:35 +01:00 |
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Julian Hammer
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8c9ba08eff
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considering port7 with simple v?mov[dq]
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2020-01-15 14:33:45 +01:00 |
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Julian Hammer
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033564cebb
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traveled through the hell of v?mov[dq]
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2020-01-15 14:03:32 +01:00 |
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JanLJL
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2c2e381278
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supports hidden operands now (for flags or special instructions)
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2020-01-14 20:54:00 +01:00 |
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JanLJL
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a6bc25708a
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Merge branch 'master' of github.com:RRZE-HPC/osaca
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2020-01-14 18:25:08 +01:00 |
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JanLJL
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fa632f3e47
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small bugfix for mm registers
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2020-01-14 18:24:00 +01:00 |
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Julian Hammer
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c1a5988599
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added v?movhp[sd] and many cmp instructions
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2020-01-14 15:52:28 +01:00 |
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Julian Hammer
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23272348e9
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removed port 7 store agu from ivb and snb
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2020-01-14 13:28:54 +01:00 |
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Julian Hammer
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cfe7b07881
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late conflict merger
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2020-01-14 13:20:44 +01:00 |
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Julian Hammer
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1a6d9ee5f8
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added conditional moves
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2020-01-14 13:11:48 +01:00 |
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Julian Hammer
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f80247991c
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Merge branch 'master' of github.com:RRZE-HPC/OSACA
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2020-01-14 13:10:52 +01:00 |
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Julian Hammer
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7dbddcc067
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a few more instructions for csx
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2020-01-14 10:51:20 +01:00 |
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JanLJL
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a3cc742a87
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enhanced for dynamic ST throughput combination
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2020-01-14 10:49:47 +01:00 |
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JanLJL
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917146a7df
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aligned expected LT with new store latency
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2020-01-14 09:31:27 +01:00 |
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JanLJL
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91676ae98f
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Merge branch 'master' of github.com:RRZE-HPC/osaca
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2020-01-14 09:29:44 +01:00 |
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JanLJL
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a6d72dca78
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added ST throughput values
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2020-01-14 09:29:40 +01:00 |
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Julian Hammer
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80af8aa106
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merged conflict
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2020-01-14 09:19:32 +01:00 |
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JanLJL
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43bdfc152c
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fixed invalid wildcards
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2020-01-14 09:04:09 +01:00 |
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Julian Hammer
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b40b075db1
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added lea instructions
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2020-01-13 13:27:28 +01:00 |
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Jan
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8e2c01cf57
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bugfix
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2020-01-13 11:20:32 +01:00 |
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Julian Hammer
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e660340522
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Merge branch 'master' of github.com:RRZE-HPC/OSACA
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2020-01-10 17:16:07 +01:00 |
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Julian Hammer
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94fcd9792f
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lots of new instructions :)
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2020-01-10 17:15:55 +01:00 |
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JanLJL
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dce0b8e753
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adjusted for mem wildcards in AArch64 ISA DB
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2020-01-10 14:38:17 +01:00 |
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JanLJL
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1dca9e93f7
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added wildcard mode for mem addressing in ISA DB
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2020-01-10 12:55:44 +01:00 |
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JanLJL
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e250f69821
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added --ignore-unknown flag and major updates in x86 parser
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2020-01-09 17:57:08 +01:00 |
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JanLJL
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bb7ff4d607
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added more instruction forms
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2020-01-09 15:18:38 +01:00 |
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JanLJL
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8567af27c7
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Merge branch 'master' of github.com:RRZE-HPC/osaca
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2020-01-09 13:21:45 +01:00 |
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JanLJL
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f477255e99
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check for non-GAS-suffix mnemonics for instruction forms with MEM ops
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2020-01-09 13:21:11 +01:00 |
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Julian Hammer
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9c9ad254df
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version bump
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2020-01-08 11:54:30 +01:00 |
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JanLJL
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a03edc1e17
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new entry
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2020-01-07 19:49:53 +01:00 |
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JanLJL
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5d55f25e4f
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tiny bugfix for src_dst operands
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2020-01-07 19:42:13 +01:00 |
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JanLJL
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7a01a02b43
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tiny update in port model
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2019-12-20 16:23:18 +01:00 |
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JanLJL
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7c1dc83658
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bugfix
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2019-12-19 18:54:47 +01:00 |
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JanLJL
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35d2762468
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enhanced dynamic combine of LD and arithmetic instr
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2019-12-19 18:50:48 +01:00 |
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Julian Hammer
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24f518808e
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fixed matching of section type descriptors
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2019-12-19 12:02:14 +01:00 |
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JanLJL
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e48f5cbce7
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Merge branch 'master' of github.com:RRZE-HPC/osaca
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2019-12-18 16:59:10 +01:00 |
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JanLJL
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bfdbdede93
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added default load tp in new HW model
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2019-12-18 16:58:34 +01:00 |
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JanLJL
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11f91fe9e1
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added default load TP and relocation in identifier
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2019-12-18 16:56:20 +01:00 |
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Julian Hammer
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1c416f5380
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broadened scope of assembler identifiers
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2019-12-17 14:53:59 +01:00 |
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Julian Hammer
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74629b7c49
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Merge branch 'master' of github.com:RRZE-HPC/OSACA
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2019-12-17 12:21:10 +01:00 |
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Julian Hammer
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da00b72545
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fixed argument check for architecture
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2019-12-17 12:06:31 +01:00 |
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JanLJL
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23d270f005
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changed from dict DB back to list DB for now
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2019-12-16 18:25:27 +01:00 |
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Julian Hammer
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e0486751e7
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allowing for comment in marker; dev version bump
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2019-12-13 17:38:35 +01:00 |
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JanLJL
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00c6400208
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performance enhancement by removing unnecessary DB parsings
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2019-12-02 15:39:59 +01:00 |
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