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Author	SHA1	Message	Date
JanLJL	6c72281d65	prepared for aarch64 8.2 support	2020-07-23 15:54:54 +02:00
JanLJL	5520362e65	adjustments and bugfixes	2020-07-13 18:53:19 +02:00
JanLJL	93060eee43	Merge branch 'master' into A64FX	2020-07-13 14:41:49 +02:00
JanLJL	0e77b7bc9a	enhanced TP scheduling	2020-07-06 18:49:46 +02:00
JanLJL	ce8c3ff9ab	bugfixes for A64FX	2020-07-06 18:48:54 +02:00
Jan	acbde7a19c	Merge pull request #48 from RRZE-HPC/n1 ... initial implementation of Neoverse N1 support	2020-07-02 09:32:54 +02:00
Cloud User	34e978d2ae	initial implementation of Neoverse N1 support	2020-06-30 20:28:57 +00:00
JanLJL	6294e2e9da	initial commit for trying to support a64fx	2020-06-26 05:20:40 +02:00
JanLJL	6801229275	PEP8 adjustments	2020-06-25 21:56:18 +02:00
JanLJL	d3d1a89600	two new instrs	2020-06-25 21:55:10 +02:00
JanLJL	93c1951097	prettified aarch64 ISA DB	2020-06-25 21:54:52 +02:00
JanLJL	7211dd0799	improvements for uops.info importer script	2020-06-25 21:53:41 +02:00
JanLJL	5258d65c8e	few more instructions	2020-06-24 17:41:30 +02:00
JanLJL	379fe80169	added initial support for Intel Ice Lake (ICL)	2020-06-22 22:15:14 +02:00
JanLJL	94d7d35c0b	more instructions	2020-05-04 18:50:58 +02:00
JanLJL	1009c60d2d	fixed wrong output format for 3-digit TP numbers	2020-04-08 21:28:50 +02:00
JanLJL	229b316b6d	added some instructions	2020-04-08 15:54:31 +02:00
JanLJL	c0753be899	added python 3.7/3.8 to tests	2020-04-02 09:20:08 +02:00
JanLJL	eaa56792ab	added bs4 dependency for Travis	2020-04-02 09:08:08 +02:00
JanLJL	3425fa3024	added tests	2020-04-02 08:57:26 +02:00
JanLJL	38924b6ec1	more instructions	2020-03-30 18:27:33 +02:00
JanLJL	d6ae457de4	removed duplicates in CSX DB	2020-03-30 18:18:35 +02:00
JanLJL	a5c2ab1a4a	bugfix for online check of operands	2020-03-26 11:46:46 +01:00
JanLJL	e4393189dc	minor update	2020-03-26 11:06:11 +01:00
JanLJL	3016fc7c46	added more tests	2020-03-26 10:19:14 +01:00
JanLJL	82f47d217c	Merge branch 'master' of github.com:RRZE-HPC/osaca	2020-03-26 10:03:23 +01:00
JanLJL	1754df42d2	enhanced x86 parser for directives	2020-03-26 10:02:39 +01:00
Julian Hammer	ac1295aac2	flag string in output now in line with required flags	2020-03-24 16:02:40 +01:00
Julian Hammer	9624e6c109	closing cache file after dump	2020-03-24 15:20:49 +01:00
Julian Hammer	2d16037c44	Merge branch 'master' of github.com:RRZE-HPC/OSACA	2020-03-21 17:18:37 +01:00
Julian Hammer	c5801cfe2f	closing cache file	2020-03-21 17:18:04 +01:00
Julian Hammer	3e960dd4ac	closing cache file	2020-03-20 15:02:30 +01:00
JanLJL	680774267d	fixed wrong import of mm registers	2020-03-17 12:56:12 +01:00
JanLJL	1aa710f195	enhanced MachineModel to support mask/zeroing differentiation for instruction forms	2020-03-17 12:55:37 +01:00
JanLJL	71206897fd	version bump v0.3.3.dev0	2020-03-16 22:02:50 +01:00
JanLJL	af247e64b6	added test to check all micro-archs	2020-03-16 21:31:14 +01:00
JanLJL	2973f543b7	fixed duplicates in SNB machine model	2020-03-16 17:28:08 +01:00
JanLJL	0b7f1ed6e7	implemented online check for src/dst of operands based on felixcloutier	2020-03-12 15:08:14 +01:00
JanLJL	17e7f0e0d8	more instruction forms and added wildcard support for registers in ISA DB	2020-03-12 15:07:51 +01:00
JanLJL	c30ad4fb33	bugfixes	2020-03-12 15:06:02 +01:00
JanLJL	666512d54d	added reg-only fallback for mem-instructions not found in ISA DB	2020-03-10 17:15:57 +01:00
JanLJL	381e9e9f76	imported reg-only instructions with port util from uops.info for ZEN2	2020-03-10 14:32:31 +01:00
JanLJL	8f63621d6d	with working rst file for PypPI	2020-03-10 10:10:29 +01:00
JanLJL	e41d05868a	removed raw directive (now for real)	2020-03-09 17:56:18 +01:00
JanLJL	8013a40e52	removed raw directive for PyPI v0.3.2	2020-03-09 17:33:39 +01:00
JanLJL	3db330de66	version bump	2020-03-09 16:52:07 +01:00
JanLJL	4e73e24b99	added documentation	2020-03-09 16:35:06 +01:00
JanLJL	dcd5b8fd61	more documentation	2020-03-05 18:39:38 +01:00
JanLJL	3fb053fa79	updated docs	2020-03-05 17:13:23 +01:00
JanLJL	cfd16aa079	added doc badges	2020-03-05 16:56:27 +01:00