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Author	SHA1	Message	Date
JanLJL	968c71b7b6	black formatting	2021-11-04 12:11:15 +01:00
JanLJL	df26edd075	Merge branch 'master' of github.com:RRZE-HPC/OSACA	2021-11-04 12:09:57 +01:00
JanLJL	a767b7f290	Closes #78, closes #79; added unary/binary logical operators	2021-11-04 12:09:44 +01:00
JanLJL	ba45038ad7	add latency of last instruction in CP	2021-11-04 11:58:40 +01:00
JanLJL	72e85075c2	better output formatting	2021-11-04 11:55:48 +01:00
Jan	40839384ec	Merge pull request #60 from RRZE-HPC/a72 ... Add support for ARM Cortex-A72	2021-10-14 18:10:36 +02:00
JanLJL	ab615547e5	added Cortex A72 in README	2021-10-14 17:10:08 +02:00
JanLJL	9c16f8bc56	formatted	2021-10-14 10:59:55 +02:00
JanLJL	be891d45d4	formatted	2021-10-14 10:53:34 +02:00
JanLJL	5735291d27	Merge branch 'master' into a72	2021-10-14 10:37:05 +02:00
JanLJL	ab368cded1	unified format	2021-10-14 09:23:35 +02:00
JanLJL	6e99954f0b	version bump v0.4.6	2021-10-07 17:10:17 +02:00
JanLJL	5205cb5cc6	fixed formatting with correct line length	2021-10-04 15:00:17 +02:00
JanLJL	e6ce870ca0	black formatting	2021-10-04 14:33:28 +02:00
JanLJL	566fbc6bc4	black conformity	2021-09-30 15:53:56 +02:00
JanLJL	b70cff21ad	added instructions for BHIVE	2021-09-29 17:26:44 +02:00
JanLJL	d181184788	enhanced parser	2021-09-29 17:26:27 +02:00
Jan	fcc3475417	added lint configs	2021-08-27 08:14:50 +02:00
JanLJL	d418c16f4a	applied flake8 and black rules	2021-08-26 16:58:19 +02:00
JanLJL	34523e1b23	fixed wrong uops info import with masking of some gather/scatter	2021-08-26 11:05:33 +02:00
JanLJL	457ccdcf77	version bump v0.4.5	2021-07-21 02:41:05 +02:00
JanLJL	ff61c65d58	added more load instrs	2021-07-21 02:34:31 +02:00
JanLJL	615c809fe3	updated a few DB entries	2021-06-02 16:37:18 +02:00
JanLJL	bce837dec9	version bump v0.4.4	2021-06-01 00:13:38 +02:00
JanLJL	090c24ade1	fixed parsing of reg ranges and lists	2021-06-01 00:10:05 +02:00
JanLJL	03a2a1da33	version bump v0.4.3	2021-05-10 12:56:35 +02:00
JanLJL	d59b100fa8	changed immediate type from str to int	2021-05-10 01:12:30 +02:00
JanLJL	5c741a8a2d	version bump v0.4.2	2021-05-05 11:16:43 +02:00
JanLJL	2f4849f44e	added tests for timeout in LCD analyis	2021-05-02 22:48:22 +02:00
JanLJL	f13a97e5b5	fixed bug in case of no uarch in CLI	2021-05-02 22:39:07 +02:00
JanLJL	66282b0eef	fix #73	2021-05-02 22:22:30 +02:00
Julian Hammer	9ec7c161ab	added missing testfile for sve instructions	2021-05-02 21:44:17 +02:00
Julian Hammer	8d8eaa8e4f	addd LD2 and ST2 instructions to a64fx	2021-04-23 13:33:32 +02:00
Julian Hammer	88d5094bf1	Merge branch 'master' of github.com:RRZE-HPC/OSACA	2021-04-23 13:18:23 +02:00
Julian Hammer	1f32252f91	improved register range and list support on AArch64	2021-04-23 13:12:18 +02:00
JanLJL	1de644cd62	fixed incompatibilty to py3.6	2021-04-20 13:59:56 +02:00
JanLJL	3d1c6aae8d	set min requirement to py3.6	2021-04-20 13:59:32 +02:00
JanLJL	dafec70e6e	added wheel to pypi publishing	2021-04-19 11:33:29 +02:00
JanLJL	6d85fbe9e4	fixed duplicate hyperlink tags v0.4.1	2021-04-19 10:58:11 +02:00
JanLJL	3f31235f8a	added no timeout option	2021-04-19 10:57:51 +02:00
JanLJL	cfc061e5e3	version bump	2021-04-19 10:14:26 +02:00
JanLJL	5eb3e07ad6	Merge branch 'master' of https://github.com/RRZE-HPC/OSACA	2021-04-19 00:34:32 +02:00
JanLJL	a82a0e24a3	bugfixed CLX as uarch flag	2021-04-19 00:34:21 +02:00
Jan	6db08c7e8e	added lcd-timeout flag, citations and updated credits	2021-04-19 00:27:24 +02:00
JanLJL	e6a54ee131	added CLX as synonym for CSX uarch	2021-04-19 00:05:53 +02:00
JanLJL	152360bad2	enhanced LCD analysis by making it parallel and added timeout flag	2021-04-19 00:04:03 +02:00
JanLJL	607d459569	keep dependency paths as generators instead of lists	2021-04-17 12:46:44 +02:00
JanLJL	b033b3b7aa	allow different base with prefix for offset values	2021-04-17 11:06:39 +02:00
Julian Hammer	0c295dc847	version bump v0.4.0	2021-04-15 14:47:09 +02:00
Julian Hammer	5588e41492	readme added to validation folder	2021-04-15 14:45:23 +02:00