JanLJL
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24de7a762b
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version bump
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2022-09-28 10:36:15 +02:00 |
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JanLJL
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2fa25e3099
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formatting for flake8
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2022-09-28 10:05:18 +02:00 |
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JanLJL
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0b440e4da9
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updated and bugfixed DB
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2022-09-28 10:01:26 +02:00 |
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JanLJL
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08e6a4be36
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updated DB
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2022-09-28 10:01:14 +02:00 |
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JanLJL
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7724ce27c7
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added Zen3 support
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2022-09-27 18:39:14 +02:00 |
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JanLJL
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4f8e37d9fd
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bugfixes and more features
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2022-09-27 18:04:59 +02:00 |
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JanLJL
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d5f1654aa8
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bugfixes
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2022-09-27 18:04:33 +02:00 |
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JanLJL
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81f40604cb
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version bump
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2022-09-08 10:17:41 +02:00 |
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JanLJL
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df747b8c48
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more instruction forms
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2022-09-07 12:48:39 +02:00 |
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JanLJL
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4e25a29a8a
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removed invalid char
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2022-09-07 10:48:45 +02:00 |
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JanLJL
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016061f72c
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more instruction forms
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2022-09-07 10:33:28 +02:00 |
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JanLJL
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ddff8c5012
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added option of explicitly mentioning k regs in DB (not simply gpr)
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2022-09-07 10:33:16 +02:00 |
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JanLJL
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2306cb58d0
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added more instructions for ICX
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2022-09-01 15:49:28 +02:00 |
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JanLJL
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660a9d0f41
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Merge branch 'master' of github.com:RRZE-HPC/osaca
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2022-08-31 14:20:07 +02:00 |
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JanLJL
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3b453de617
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added AND instr
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2022-08-31 14:19:23 +02:00 |
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JanLJL
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b93d911bb7
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fix bug in port util
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2022-08-31 14:17:52 +02:00 |
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JanLJL
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21cfb8d011
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version bump
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2022-08-29 12:03:47 +02:00 |
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JanLJL
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76542782c8
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formatting
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2022-08-29 11:30:46 +02:00 |
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JanLJL
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671f7f5591
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added ICX architecture
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2022-08-29 11:14:56 +02:00 |
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JanLJL
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d81c53ef91
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fixed #88
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2022-06-22 17:09:24 +02:00 |
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JanLJL
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a018f80597
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version bump
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2022-04-08 13:51:08 +02:00 |
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JanLJL
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2bc6ba999f
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a few more instructions
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2022-04-08 12:02:05 +02:00 |
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JanLJL
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93c0753db3
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formatting
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2022-04-07 12:17:08 +02:00 |
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JanLJL
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ca0540563d
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Merge branch 'master' of github.com:RRZE-HPC/OSACA
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2022-04-07 10:39:16 +02:00 |
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JanLJL
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467f212fa3
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updates
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2022-04-07 10:39:12 +02:00 |
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JanLJL
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0de00e512b
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removed temp file
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2022-04-06 16:28:02 +02:00 |
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Jan
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3d26d6b82a
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Merge pull request #84 from qcjiang/feature/tsv110
Feature/tsv110
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2022-04-06 16:25:39 +02:00 |
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JanLJL
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75bc03bc76
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bugfixes and additions
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2022-03-28 10:06:51 +02:00 |
|
Qingcai Jiang
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fa06b9ccac
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fix a bug about orr in tsv110
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2022-03-20 14:53:34 +08:00 |
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JanLJL
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9c966c2359
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small bugfixes
|
2022-03-17 16:38:28 +01:00 |
|
Qingcai Jiang
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13ec7dc20e
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Merge branch 'feature/tsv110' of github.com:qcjiang/OSACA into feature/tsv110
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2022-02-27 17:19:28 +08:00 |
|
Qingcai Jiang
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b2a326070f
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adjust sshll instruction
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2022-02-27 17:19:15 +08:00 |
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Jan
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0119f97942
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fixed typo
|
2022-02-14 10:42:01 +01:00 |
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JanLJL
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e1a5272fdf
|
formatting
|
2022-01-27 10:12:00 +01:00 |
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Jan
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5748b2987b
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Merge pull request #85 from qcjiang/bug_fix/when_mov_is_the_last_instr
a) fix a bug when 'mov' is the last instruction and no markers are given
b) fix bug when kernel consists of only unknown load instructions
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2022-01-27 10:09:28 +01:00 |
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JanLJL
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a447e289ff
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adjusted DB
|
2022-01-26 14:25:01 +01:00 |
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JanLJL
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d2a4749c39
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added lane comparison for AArch64 reg operands
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2022-01-26 14:24:48 +01:00 |
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Qingcai Jiang
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c917a83974
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modify some instructions for tsv110
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2022-01-06 16:25:08 +08:00 |
|
Qingcai Jiang
|
5ebd8a019e
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add some instructions for tsv110
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2022-01-04 20:59:35 +08:00 |
|
Qingcai Jiang
|
fe42870cc2
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add some instructions for tsv110
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2022-01-04 18:45:32 +08:00 |
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Qingcai Jiang
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e70229aa32
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Merge branch 'bug_fix/when_mov_is_the_last_instr' into feature/tsv110
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2021-12-30 21:33:42 +08:00 |
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Qingcai Jiang
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71b9a17ab8
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fix a bug when longest_path is not integer, try 'ldpw3, w1, [x0, #0x48]' in AArch64
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2021-12-30 21:32:29 +08:00 |
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Qingcai Jiang
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b484179e02
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fix some instr for tsv110
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2021-12-30 21:24:41 +08:00 |
|
Qingcai Jiang
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203ea2dfb0
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XMerge branch 'bug_fix/when_mov_is_the_last_instr' into feature/tsv110
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2021-12-30 20:32:34 +08:00 |
|
Qingcai Jiang
|
0e984f4ec7
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fix a bug when 'mov' is the last instruction
|
2021-12-30 20:30:43 +08:00 |
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Qingcai Jiang
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c1fa5e3bce
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add some instructions for tsv110, now support most of the instructions
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2021-12-19 18:13:32 +08:00 |
|
QCJiang
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0ab6efa9cb
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Merge branch 'RRZE-HPC:master' into feature/tsv110
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2021-12-18 17:52:54 +08:00 |
|
Qingcai Jiang
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feda03408f
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add some instructions for tsv110
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2021-12-18 17:51:41 +08:00 |
|
Qingcai Jiang
|
a738d82533
|
add some instructions for tsv110
|
2021-12-18 15:44:07 +08:00 |
|
Qingcai Jiang
|
4e10491fcb
|
add some instructions for tsv110
|
2021-12-15 21:51:59 +08:00 |
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